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A Hybrid Genetic Approach for Circuit Bipartitioning
Jong-Pil Kim1, Yong-Hyuk Kim2, and Byung-Ro Moon2
1Electronics and Telecommunications Research Institute, 161 Gajeong-dong, Yuseong-gu, Daejeon, 305-350 Korea
kimjp@etri.re.kr
2School of Computer Science & Engineering, Seoul National University, Shillim-dong, Kwanak-gu, Seoul, 151-742 Korea
yhdfly@soar.snu.ac.kr
moon@soar.snu.ac.kr
Abstract. We propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local optimization heuristic which is a modification of Fiduccia-Matheyses algorithm. Using well-known benchmarks (including ACM/SIGDA benchmarks), the combination of genetic algorithm and the local heuristic performed better than hMetis, a representative circuit partitioning algorithm.
LNCS 3103, p. 1054 ff.
lncs@springer.de
© Springer-Verlag Berlin Heidelberg 2004