Enabling Self-Reconfiguration on a Video Processing Platform
K. F. Ackermann, B. Hoffmann, L. S. Indrusiak and M. Glesner
FPGA implementations of complex image processing algorithms are often limited in flexibility and by the amount of available chip resources. This article presents a hardware design of an adaptive self-reconfigurable video processing platform. Dynamic self-reconfiguration increases a designpsilas flexibility and enables the use of FPGAs with a fraction of resources actually needed by the algorithm. As a case study two implementation approaches of a complex frame-grabber with a set of dynamically reconfigurable kernels are evaluated and further improvements are outlined.
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BibTex Entry
@inproceedings{Ackermann2008,
author = {K. F. Ackermann and B. Hoffmann and L. S. Indrusiak and M. Glesner},
booktitle = {Proc. 3rd IEEE Int. Symposium on Industrial Embedded Systems (SIES)},
pages = {19-26},
publisher = {IEEE},
title = {Enabling Self-Reconfiguration on a Video Processing Platform},
year = {2008}
}