Mapping of real-time applications on a packet switching NoC-based MPSoC
G. A. Madalozzo, L. S. Indrusiak, F. G. Moraes
Many-core systems are commonplace in the consumer electronic market, with Real-Time (RT) applications being part of the workload. Therefore, the design of many-core systems (MPSoCs) requires mechanisms to meet RT constraints. The goal of this paper is to present a mapping heuristic that guarantees the RT constraints in a packet switching NoC-based MPSoC. The RT mapping heuristic adopts the response time using the Response Time Analysis (RTA) test to meet the RT constraints. The RTA ensures that already mapped tasks dot not interfere in the mapping of a new task. Experiments executing in a cycle-accurate MPSoC shows that the use of the proposed mapping guarantees the constraints of embedded RT applications. The proposed mapping is compared with two reference mappings (LEC-DN and HEAT), varying the MPSoC occupation and the number of RT applications executing simultaneously in the system. In all experiments, the RTA mapping meet all deadlines, while the other mapping heuristics present deadline misses. On the other side, the RTA mapping presents a smaller MPSoC occupation since it reduces the CPU sharing.
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BibTex Entry
@inproceedings{GAMadalozzo2016,
author = {G. A. Madalozzo, L. S. Indrusiak, F. G. Moraes},
booktitle = {Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS)},
pages = {640-643},
title = {Mapping of real-time applications on a packet switching NoC-based MPSoC},
year = {2016}
}