Embedded systems are increasingly being designed in a system-on-chip (SoC) form to save costs. Often, a field programmable gate array (FPGA) device is used to contain the processor, memory and devices used by the system. In this environment, it is possible to make use of an application-specific instruction processor (ASIP) in place of a conventional processor, and it is also possible to add customised co-processors to the device. Both of these technologies can be optimised to accelerate a particular application, potentially reducing hardware costs and power consumption. However, embedded systems are generally also real-time systems, and the current approaches for determining where optimisations should be applied fail to take this into account, neglecting important real-time properties such as deadlines and response times. We demonstrate that designers may be led to poor optimisation decisions by such approaches, then show how timing properties may be combined with profile data to allow informed optimisation choices to be made.

BibTex Entry

@inproceedings{Whitham2005,
 author = {Jack Whitham and Neil Audsley},
 booktitle = {Proc. 2nd UK Embedded Forum},
 pages = {91--110},
 title = {The Use of ASIPs and Customised Co-processors in an Embedded Real-Time System},
 year = {2005}
}