Papers published in 2011 | Real-Time Systems Group

Multi-Modal Routing to Tolerate Failures
T. H. Lim, I. Bate and J. Timmis

Response-Time Analysis for Mixed Criticality Systems
S.K. Baruah, A. Burns and R. I. Davis

Bio-inspired Error Detection for Complex Systems
M. Drozda, I. Bate and J. Timmis

Efficient Task Allocation to FPGAs in the Safety Critical Domain
P. Conmy and I. Bate

Predictability as an Emergent Behaviour
A. Burns and D. Griffin

Timing Faults and Mixed Criticality Systems
A. Burns and S. Baruah

Optimal Priority Assignment Algorithms for Probabilistic Real-Time Systems
D. Maxim, O. Buffet, L. Santinelli, L. Cucu-Grosjean and R. I. Davis

Schedulability Analysis of CAN with Non-abortable Transmission Requests
D.A. Khan, R.I. Davis and N. Navet

Probabilistic Instruction Cache Analysis using Bayesian Networks
M. Bartlett, I. Bate, J. Cussens and D. Kazakov

Developing Safe and Dependable Sensornets
I. Bate, Y. Wu and J. Stankovic

Collective Self-detection Scheme for Adaptive Error Detection in a Foraging Swarm of Robots
H.K. Lau, J. Timmis and I. Bate

Dynamics for WCET
David Griffin and Alan Burns

Controller Area Network (CAN) Schedulability Analysis with FIFO queues
R.I. Davis, S. Kollmann, V. Pollex and F. Slomka

Assessment of Trace-Differences in Timing Analysis for Complex Real-Time Embedded Systems
Y. Lu, T. Nolte, I. Bate, J. Kraft and C. Norstrom

Trace-Based Statistical Response-Time Analysis of Complex Real-Time Embedded Systems
Y. Lu, T. Nolte, I. Bate and L. Cucu-Grosjean

Video Subset Selection for Measurement Based Worst Case Execution Time Analysis
Sitsofe Wheeler, Iain Bate and Mark Bartlett

Evaluating the feasibility of network coding for NoCs
L. S. Indrusiak

Extending Java for Heterogeneous Embedded System Description
G. J. Plumbridge and N. C. Audsley

Genetic mapping of hard real-time applications onto NoC-based MPSoCs a first approach
P. Mesidis and L. S. Indrusiak

Implementing Mixed Criticality Systems in Ada
S. Baruah and A. Burns

Programming Langugaes for Real-Time Applications Executing on Parallel hardware
A. Burns

Pre-emption cost aware response time analysis for fixed priority pre-emptive systems
S. Altmeyer, R.I. Davis and C. Maiza

LIPS: A Protocol Suite For Homeostatic Sensornet Management
J. Tate and I. Bate

Model-based development of embedded systems - the MADES approach
I. Gray, N. Matragkas, N. Audsley, L. S. Indrusiak, D. Kolovos and R. Paige

Model-based hardware generation and programming - the MADES approach
I. Gray, N. Matragkas, N. Audsley, L. S. Indrusiak, D. Kolovos and R. Paige

Targeting complex embedded architectures by combining the Multicore Communications API (MCAPI) with Compile-Time Virtualisation
Ian Gray and Neil Audsley

IA3: An Interference Aware Allocation Algorithm for Multicore Hard Real-Time Systems
M. Paolieri, E. Quinones, F.J. Cazorla, R.I. Davis and M. Valero

FPZL Schedulability Analysis
R.I. Davis and A. Burns

Controller Area Network (CAN) Schedulability Analysis with FIFO queues
R. I. Davis, S. Kollmann, V. Pollex and F. Slomka

A Survey of Hard Real-Time Scheduling for Multiprocessor Systems
R.I. Davis and A. Burns

A model-based development approach for the verification of real-time Java code
Niusha Hakimi Pour, Paul Strooper and Andy Wellings

Adaptive data-driven error detection in swarm robotics with statistical classifiers
H.K. Lau, I.Bate, P. Cairns and J.Timmis

Asynchronous event handling and Safety Critical Java
Andy Wellings and Minseong Kim

Comparing Models of Nondeterministic Expression Evaluation
Ian J. Hayes, Alan Burns, Brijesh Dongol and Cliff B. Jones

Dependency Patterns and Timing for Grid Workloads
Andrew Burkimsher

Exploring Heterogeneous NoC-based MPSoCs: from FPGA to High-Level Modeling
L. Ost, G. M. Almeida, M. Mandelli, E. Wachter, S. Varyani, L. S. Indrusiak, G. Sassatelli, M. Robert and F. Moraes

Exploring NoC-Based MPSoC Design Space with Power Estimation Models
L. Ost, G. M. Guindani, F. G. Moraes, L. S. Indrusiak and S. Maatta

Fast and Accurate Transaction-Level Model of a Wormhole Network-on-Chip with Priority Preemptive Virtual Channel Arbitration
L. S. Indrusiak and O. M. Santos

Multiprocessors and Asynchronous Event Handling in the Real-Time Specification for Java
Minseong Kim and Andy Wellings

On the road to real-time osgi: Extending osgi with an admission control protocol
T Richardson and AJ Wellings

Practical and Theoretical Considerations on Low-Power Probability-Codes for Networks-on-Chip
A. Garcia-Ortiz and L. Soares Indrusiak

Safety-Critical Java Technology Specification, Public draft
Doug Locke, B. Scott Andersen, Ben Brosgol, Mike Fulton, Thomas Henties, James J. Hunt, Johan Olmütz Nielsen, Kelvin Nilsen, Martin Schoeberl, Joyce Tokar, Jan Vitek and Andy Wellings

Safety-critical Java in Circus
Ana Cavalcanti, Andy Wellings, Jim Woodcock, Kun Wei and Frank Zeyda

Sensitivity analysis of arbitrary deadline real-time systems with EDF scheduling
Fengxiang Zhang, Alan Burns and Sanjoy K. Baruah

The Safety-Critical Java Mission Model: A Formal Account.
Frank Zeyda, Ana Cavalcanti and Andy J. Wellings

WCET analysis of modern processors using multi-criteria optimisation
I. Bate and U. Khan