Welcome

Table of Contents

Author Index

EMSOFT 2004 Foreword

EMSOFT 2004 Conference Organization

EMSOFT 2004 Reviewers

Session 1: Operating Systems               (Return to Contents)
Chair: D. Mossé (University of Pittsburgh)

Remote Customization of Systems Code for Embedded Devices (Page 7)
S. Bhatia, C. Consel (LaBRI/INRIA)
C. Pu (Georgia Institute of Technology)

Using Resource Reservation Techniques for Power-Aware Scheduling (Page 16)
C. Scordino (University of Pisa)
G. Lipari (Scuola Superiore Sant'Anna)

An Experimental Analysis of the Effect of the Operating System on Memory Performance in Embedded Multimedia Computing (Page 26)
S. Park, Y. Lee, H. Shin (Seoul National University)

Session 2: Verification               (Return to Contents)
Chair: T. Henzinger (University of California at Berkeley)

Model Based Estimation and Verification of Mobile Device Performance (Page 34)
G. Raghavan (Nokia Research Center)
A. Salomaki (Nokia Technology Platforms)
R. Lencevicius (Nokia Research Center)

Separation of Concerns: Overhead in Modeling and Efficient Simulation Techniques (Page 44)
G. Yang, A. Sangiovanni-Vincentelli (University of California at Berkeley)
Y. Watanabe, F. Balarin (Cadence Berkeley Laboratories)

Session 3: Energy-aware Systems               (Return to Contents)
Chair: L. Benini (University of Bologna)

Practical PACE for Embedded Systems (Page 54)
R. Xu, C. Xi, R. Melhem, D. Mossé (University of Pittsburgh)

Energy-Efficient, Utility Accrual Scheduling under Resource Constraints for Mobile Embedded Systems (Page 64)
H. Wu, B. Ravindran (Virginia Tech)
E. D. Jensen (The MITRE Corporation)
P. Li (Virginia Tech)

Binary Translation to Improve Energy Efficiency through Post-pass Register Re-allocation (Page 74)
K. Zhang, T. Zhang, S. Pande (Georgia Institute of Technology)

Session 4: Scheduling               (Return to Contents)
Chair: G. Lipari (Scuola Superiore Sant'Anna)

WRR-SCAN: A Rate-Based Real-Time Disk-Scheduling Algorithm (Page 86)
C.-H. Tsai, E. T.-H. Chu, T.-Y. Huang (National Tsing Hua University)

Scheduling within Temporal Partitions: Response-time Analysis and Server Design (Page 95)
L. Almeida, P. Pedreiras (Universidade de Aveiro)

Session 5: Programming Languages               (Return to Contents)
Chair: J. Sztipanovits (Vanderbilt University)

A Typed Assembly Language for Real-Time Programs (Page 104)
T. A. Henzinger (EPFL and University of California at Berkeley)
C. M. Kirsch (University of Salzburg and University of California at Berkeley)

Compiler-Assisted Demand Paging for Embedded Systems with Flash Memory (Page 114)
C. Park (Samsung Electronics Co., Ltd)
J. Lim, K. Kwon, J. Lee, S. L. Min (Seoul National University)

Garbage Collection for Embedded Systems (Page 125)
D. F. Bacon, P. Cheng, D. Grove (IBM T.J. Watson Research Center)

Session 6: Formal Methods I               (Return to Contents)
Chair: A. Benveniste (IRISA/INRIA)

Reactive Process Networks (Page 137)
M. Geilen, T. Basten (Eindhoven University of Technology)

An Event Detection Algebra for Reactive Systems (Page 147)
J. Carlson, B. Lisper (Mälardalen University)

Session 7: System Design               (Return to Contents)
Chair: L. Almeida (University of Aveiro)

Conservative Approximations for Heterogeneous Design (Page 155)
R. Passerone (Cadence Design Systems, Inc.)
J. R. Burch (Synopsys, Inc.)
A. L. Sangiovanni-Vincentelli (University of California at Berkeley)

Exploiting Prescriptive Aspects: A Design Time Capability (Page 165)
J. A. Stankovic, P. Nagaraddi, Z. Yu, Z. He (University of Virginia)
B. Ellis (Boeing)

Making Mechatronic Agents Resource-aware in order to Enable Safe Dynamic Resource Allocation (Page 175)
S. Burmester, M. Gehrke, H. Giese, S. Oberthür (University of Paderborn)

A Metrics System for Quantifying Operational Coupling in Embedded Computer Control Systems (Page 184)
D. Chen, M. Törngren (Royal Institute of Technology)

Session 8: Distributed Systems               (Return to Contents)
Chair: L. Lo Bello (University of Catania)

Loose Synchronization of Event-Triggered Networks for Distribution of Synchronous Programs (Page 193)
J. Romberg, A. Bauer (Technische Universität München)

Reuse of Software in Distributed Embedded Automotive Systems (Page 203)
B. Hardung (AUDI AG)
T. Kölzow (Audi Electr. Venture GmbH)
A. Krüger (Audi AG)

Session 9: Formal Methods II               (Return to Contents)
Chair: S. Yovine (Verimag)

A Model-Based Approach to Integrating Security Policies for Embedded Devices (Page 211)
M. McDougall, R. Alur, C. A. Gunter (University of Pennsylvania)

Heterogeneous Reactive Systems Modeling: Capturing Causality and the Correctness of Loosely Time-Triggered Architectures (LTTA) (Page 220)
A. Benveniste, B. Caillaud (Irisa/Inria)
L. P. Carloni (University of California at Berkeley)
P. Caspi (Verimag)
A. L. Sangiovanni-Vincentelli (University of California at Berkeley)

Session 10: Formal Languages               (Return to Contents)
Chair: J. Sifakis (Verimag)

Towards a Higher-Order Synchronous Data-Flow Language (Page 230)
J.-L. Colaço (Esterel Technologies)
A. Girault (INRIA Rhône Alpes)
G. Hamon (Chalmers University)
M. Pouzet (Université Pierre et Marie Curie)

Towards Direct Execution of Esterel Programs on Reactive Processors (Page 240)
P. S. Roop, Z. Salcic, M. W. Sajeewa Dayaratne (University of Auckland)

A Methodology for Generating Verified Combinatorial Circuits (Page 249)
O. Kiselyov (Fleet Numerical Meteorology and Oceanography)
K. N. Swadi, W. Taha (Rice University)

Defining and Translating a "Safe" Subset of Simulink/Stateflow into Lustre (Page 259)
N. Scaife, C. Sofronis, P. Caspi, S. Tripakis, F. Maraninchi (Laboratoire Verimag)

Session 11: Timing Analysis               (Return to Contents)
Chair: G. Bernat (University of York)

Approximation of the Worst-Case Execution Time Using Structural Analysis (Page 269)
M. Corti, T. Gross (ETH Zürich)

Multiple Process Execution in Cache Related Preemption Delay Analysis (Page 278)
J. Staschulat, R. Ernst (Technical University of Braunschweig)

An Approach for Integrating Basic Retiming and Software Pipelining (Page 287)
N. Chabini (Royal Military College of Canada)
W. Wolf (Princeton University)

Reducing Program Image Size by Extracting Frozen Code and Data (Page 297)
D. Citron, G. Haber, R. Levin (IBM Haifa Labs.)