|
Embedded
Systems Week Author Index
Hamann,
A.
CASES'06:
Methods for Power Optimization in Distributed Embedded Systems with Real-Time Requirements (page 379)
CODES+ISSS'06:
A Formal Approach to Robustness Maximization of Complex Heterogeneous Embedded Systems (page 40)
Hamon,
G.
EMSOFT'06:
Mixing Signals and Modes in Synchronous Data-flow Systems (page 73)
Han,
C.-C.
EMSOFT'06:
Multi-level Software Reconfiguration for Sensor Networks (page 112)
Han,
H.
CASES'06:
Protected Heap Sharing for Memory-Constrained Java Environments (page 212)
Hardnett,
C. R.
CASES'06:
Compiler Optimization of Embedded Applications for an Adaptive SoC Architecutre (page 312)
Hazelwood,
K.
CASES'06:
A Dynamic Binary Instrumentation Engine for the ARM Architecture (page 261)
Hefner,
A. R.
CASES'06:
Modeling Heterogeneous SoCs with SystemC: A Digital/MEMS Case Study (page 54)
|
(Return
to Top) |
Hempstead,
M.
CASES'06:
Architecture and Circuit Techniques for Low-Throughput, Energy-Constrained Systems Across Technology Generations (page 368)
|
(Return
to Top) |
Henkel,
J.
CODES+ISSS'06:
Bounded
Arbitration Algorithm for QoS-Supported On-chip Communication (page
76)
Henzinger,
T. A.
EMSOFT'06:
A Hierarchical Coordination Language for Interacting Real-Time Tasks (page 132)
Hermenegildo,
M.
CASES'06:
High-Level Languages for Small Devices: A Case Study (page 271)
Hines,
S.
CASES'06:
Adapting Compilation Techniques to Enhance the Packing of Instructions into Registers (page 43)
Hiroaki,
T.
CODES+ISSS'06:
Pack Instruction Generation for Media Processors Using Multi-valued Decision Diagram (page 154)
Hohenauer,
M.
CODES+ISSS'06:
Retargetable Code Optimization with SIMD Instructions (page 148)
Holsmark,
R.
CODES+ISSS'06:
A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC Systems (page 142)
Hong,
S.
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
|
(Return
to Top) |
Hoover,
G.
CASES'06:
Extensible Control Architectures (page 323)
CASES'06:
A Case Study of Multi-Threading in the Embedded Space (page 357)
Hormati,
A.
CASES'06:
Scalable Subgraph Mapping for Acyclic Computation Accelerators (page 147)
Hsieh,
W.-W.
CODES+ISSS'06:
A Bus Architecture for Crosstalk Elimination in High Performance Processor Design (page 247)
Hu,
X. S.
CASES'06:
Methods for Power Optimization in Distributed Embedded Systems with Real-Time Requirements (page 379)
Hu,
X.
CASES'06:
High-performance Packet Classification Algorithm for Many-core and Multithreaded Network Processor (page 334)
Hua,
B.
CASES'06:
High-performance Packet Classification Algorithm for Many-core and Multithreaded Network Processor (page 334)
Hwang,
J.
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
Hwang,
T. T.
CODES+ISSS'06:
A Bus Architecture for Crosstalk Elimination in High Performance Processor Design (page 247)
|
(Return
to Top) |
Iercan,
D.
EMSOFT'06:
A Hierarchical Coordination Language for Interacting Real-Time Tasks (page 132)
Ignjatovic,
A.
CODES+ISSS'06:
Application Specific Forwarding Network and Instruction Encoding for Multi-pipe ASIPs (page 241)
Imai,
M.
CODES+ISSS'06:
Pack Instruction Generation for Media Processors Using Multi-valued Decision Diagram (page 154)
Issenin,
I.
CASES'06:
Mitigating Soft Error Failures for Multimedia Applications by Selective Data Protection (page 411)
CODES+ISSS'06:
Data Reuse Driven Energy-Aware MPSoC Co-Synthesis of Memory and Communication Architecture for Streaming Applications (page 294)
Ivers,
M.
CODES+ISSS'06:
Integrated Analysis of Communicating Tasks in MPSoCs (page 288)
|
(Return
to Top) |
Jackson,
E. K.
EMSOFT'06:
Towards A Formal Foundation For Domain Specific Modeling Languages (page 53)
Jacob,
B.
CASES'06:
Modeling Heterogeneous SoCs with SystemC: A Digital/MEMS Case Study (page 54)
Jang,
C.
CASES'06:
A Dynamic Code Placement Technique for Scratchpad Memory Using Postpass Optimization (page 223)
Jansen,
P.
CODES+ISSS'06:
Efficient Computation of Buffer Capacities for Multi-Rate Real-Time Systems with Back-Pressure (page 10)
Jerraya,
A. A.
CODES+ISSS'06:
Invited Paper: SHAPES: A Tiled Scalable Software Hardware Architecture Platform for Embedded Systems (page 167)
|
(Return
to Top) |
Jha,
N. K.
CODES+ISSS'06:
Architectural Support for Safe Software Execution on Embedded Processors (page 106)
Jin,
HS.
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
Jo,
H.
EMSOFT'06:
A Superblock-based Flash Translation Layer for NAND Flash Memory (page 161)
Joo,
Y.
CODES+ISSS'06:
Demand Paging for OneNANDTM Flash eXecute-In-Place (page 229)
Jouppi,
N.
CASES'06:
Improving the Performance and Power Efficiency of Shared Helpers in CMPs (page 345)
Jung,
D.
CASES'06:
CFLRU: A Replacement Algorithm for Flash Memory (page 234)
Jung,
D.-H.
CASES'06:
Supporting Precise Garbage Collection in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems (page 35)
EMSOFT'06:
Efficient Exception Handling in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems (page 188)
Juurlink,
B.
CASES'06:
Limitations of Special-Purpose Instructions for Similarity Measurements in Media SIMD Extensions (page 293)
|
(Return
to Top) |
Kaakani,
Z.
EMSOFT'06:
Schedulable Persistence System for Real-Time Applications in Virtual Machine (page 195)
Kang,
J.-u.
CASES'06:
CFLRU: A Replacement Algorithm for Flash Memory (page 234)
EMSOFT'06:
A Superblock-based Flash Translation Layer for NAND Flash Memory (page 161)
Karl,
W.
CASES'06:
A Network Agent for Diagnosis and Analysis of Real-time Ethernet Networks (page 65)
Kawamura,
S.
CODES+ISSS'06:
Tutorial
2: Automotive Electronics: System, Software, and Local Area Network (page
2)
Kejariwal,
A.
CODES+ISSS'06:
Invited Paper: Challenges in Exploitation of Loop Parallelism in Embedded Applications (page 173)
Keung,
K.-M.
CASES'06:
State Space Reconfigurability: An Implementation Architecture for Self Modifying Finite Automata (page 83)
Kgil,
T.
CASES'06:
FlashCache: A NAND Flash Memory File Cache for Low Power Web Servers (page 103)
|
(Return
to Top) |
Khouri,
K.
CODES+ISSS'06:
Floorplan Driven Leakage Power Aware IP-Based SoC Design Space Exploration (page 118)
Kim,
C.
CASES'06:
A Dynamic Code Placement Technique for Scratchpad Memory Using Postpass Optimization (page 223)
Kim,
D.
CODES+ISSS'06:
Phase Guided Sampling for Efficient Parallel Application Simulation (page 187)
Kim,
J.
EMSOFT'06:
Energy-Efficient File Placement Techniques for Heterogeneous Mobile Storage Systems (page 171)
Kim,
J.-s.
CASES'06:
CFLRU: A Replacement Algorithm for Flash Memory (page 234)
EMSOFT'06:
A Superblock-based Flash Translation Layer for NAND Flash Memory (page 161)
Kim,
Janghwan
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
Kim,
Jeongeun
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
Kim,
K.-H.
CODES+ISSS'06:
Invited Talk: Key Technologies for the Next Generation Wireless Communications (page 266)
|
(Return
to Top) |
Kim,
M.
CODES+ISSS'06:
Design Space Exploration of Real-time Multi-media MPSoCs with Heterogeneous Scheduling Policies (page 16)
Kim,
T.
CODES+ISSS'06:
Thermal-Aware High-level Synthesis Based on Network Flow Method (page 124)
Kim,
Y.-J.
EMSOFT'06:
Energy-Efficient File Placement Techniques for Heterogeneous Mobile Storage Systems (page 171)
Kirsch,
C. M.
EMSOFT'06:
A Hierarchical Coordination Language for Interacting Real-Time Tasks (page 132)
Klauser,
A.
CASES'06:
A Dynamic Binary Instrumentation Engine for the ARM Architecture (page 261)
Klein,
P.
CASES'06:
Modeling Heterogeneous SoCs with SystemC: A Digital/MEMS Case Study (page 54)
Ko,
D.-I.
CODES+ISSS'06:
The Pipeline Decomposition Tree: An Analysis Tool for Multiprocessor Implementation of Image Processing Applications (page 52)
Kong,
J.-T.
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
|
(Return
to Top) |
Konishi,
M.
CASES'06:
An Accurate and Efficient Simulation-Based Analysis for Worst Case Interruption Delay (page 2)
Kozintsev,
I.
CODES+ISSS'06:
Phase Guided Sampling for Efficient Parallel Application Simulation (page 187)
Krintz,
C.
CODES+ISSS'06:
A Run-Time, Feedback-Based Energy Estimation Model for Embedded Devices (page 28)
Kudlur,
M.
CASES'06:
Modulo Graph Embedding: Mapping Applications onto Coarse-Grained Reconfigurable Architectures (page 136)
CODES+ISSS'06:
Steamroller: Automatic Synthesis of Prescribed Throughput Accelerator Pipelines (page 270)
CODES+ISSS'06:
Increasing Hardware Efficiency with Multifunction Loop Accelerators (page 276)
Kumar,
S.
CODES+ISSS'06:
A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC Systems (page 142)
Kurdahi,
F.
CODES+ISSS'06:
Floorplan Driven Leakage Power Aware IP-Based SoC Design Space Exploration (page 118)
CODES+ISSS'06:
System-Level Power-Performance Trade-Offs in Bus Matrix Communication Architecture Synthesis (page 300)
Kwon,
K.-T.
EMSOFT'06:
Energy-Efficient File Placement Techniques for Heterogeneous Mobile Storage Systems (page 171)
|
(Return
to Top) |
Lawall,
J. L.
EMSOFT'06:
Energy Adaptation for Multimedia Information Kiosks (page 223)
Lee,
E. A.
EMSOFT'06:
A Causality Interface for Deadlock Analysis in Dataflow (page 44)
Lee,
H.-H. S.
CASES'06:
Reducing Energy of Virtual Cache Synonym Lookup using Bloom Filters (page 179)
CASES'06:
Entropy-Based Low Power Data TLB Design (page 304)
Lee,
I.
EMSOFT'06:
An Analysis Framework for Network-Code Programs (page 122)
EMSOFT'06:
Incremental Schedulability Analysis of Hierarchical Real-Time Components (page 272)
Lee,
J.
CASES'06:
Supporting Precise Garbage Collection in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems (page 35)
CASES'06:
CFLRU: A Replacement Algorithm for Flash Memory (page 234)
EMSOFT'06:
A Superblock-based Flash Translation Layer for NAND Flash Memory (page 161)
EMSOFT'06:
Efficient Exception Handling in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems (page 188)
EMSOFT'06:
Scratchpad Memory Management for Portable Systems with a Memory Management Unit (page 321)
CASES'06:
A Dynamic Code Placement Technique for Scratchpad Memory Using Postpass Optimization (page 223)
|
(Return
to Top) |
Lee,
K.
CASES'06:
Mitigating Soft Error Failures for Multimedia Applications by Selective Data Protection (page 411)
Lee,
S. E.
CODES+ISSS'06:
Increasing the Throughput of an Adaptive Router in Network-on-Chip (NoC) (page 82)
Lee,
Sangwoo
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
Lee,
Sheayun
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
Lee,
W.
CODES+ISSS'06:
B2Sim: A Fast Micro-Architecture Simulator Based on Basic Block Characterization (page 199)
Lee,
Y.-H.
EMSOFT'06:
Schedulable Persistence System for Real-Time Applications in Virtual Machine (page 195)
Leupers,
R.
CODES+ISSS'06:
Retargetable Code Optimization with SIMD Instructions (page 148)
CODES+ISSS'06:
Invited Paper: SHAPES: A Tiled Scalable Software Hardware Architecture Platform for Embedded Systems (page 167)
|
(Return
to Top) |
Lim,
P.
CODES+ISSS'06:
Thermal-Aware High-level Synthesis Based on Network Flow Method (page 124)
Lipskoch,
H.
CODES+ISSS'06:
Battery Discharge Aware Energy Feasibility Analysis (page 22)
Liu,
A.-H.
CODES+ISSS'06:
Automatic Run-Time Extraction of Communication Graphs from Multithreaded Applications (page 46)
Liu,
D.
CASES'06:
High-performance Packet Classification Algorithm for Many-core and Multithreaded Network Processor (page 334)
Löb,
H.-P.
CASES'06:
A Network Agent for Diagnosis and Analysis of Real-time Ethernet Networks (page 65)
Loechner,
V.
CASES'06:
Memory Optimization by Counting Points in Integer Transformations of Parametric Polytopes (page 74)
Loh,
G. H.
CASES'06:
Entropy-Based Low Power Data TLB Design (page 304)
Luk,
W.
CASES'06:
Incremental Elaboration for Run-Time Reconfigurable Hardware Designs (page 93)
|
|
|
|
|