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Embedded
Systems Week Author Index
Madl, G.
EMSOFT'06:
Formal Performance Evaluation of AMBA-based System-on-Chip Designs (page 311)
Mahlke, S.
CASES'06:
Modulo Graph Embedding: Mapping Applications onto Coarse-Grained Reconfigurable Architectures (page 136)
CASES'06:
Scalable Subgraph Mapping for Acyclic Computation Accelerators (page 147)
CASES'06:
Cost-Efficient Soft Error Protection for Embedded Microprocessors (page 421)
CODES+ISSS'06:
Steamroller: Automatic Synthesis of Prescribed Throughput Accelerator Pipelines (page 270)
CODES+ISSS'06:
Increasing Hardware Efficiency with Multifunction Loop Accelerators (page 276)
Mamagkakis, S.
EMSOFT'06:
Energy-Efficient Dynamic Memory Allocators at the Middleware Level of Embedded Systems (page 215)
Manna, Z.
EMSOFT'06:
Efficient Distributed Deadlock Avoidance with Liveness Guarantees (page 12)
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Marculescu, D.
CODES+ISSS'06:
Hardware
Based Frequency/Voltage Control of Voltage Frequency Island Systems (page
34)
Marr, B.
CASES'06:
Probabilistic Arithmetic and Energy Efficient Embedded Signal Processing (page 158)
Matsumoto, N.
CODES+ISSS'06:
Pack Instruction Generation for Media Processors Using Multi-valued Decision Diagram (page 154)
Meyr, H.
CODES+ISSS'06:
Retargetable Code Optimization with SIMD Instructions (page 148)
Miller, E. L.
EMSOFT'06:
Reliability Mechanisms for File Systems Using Non-Volatile Memory as a Metadata Store (page 178)
Min, S. L.
CASES'06:
A Dynamic Code Placement Technique for Scratchpad Memory Using Postpass Optimization (page 223)
Miranda, M.
CODES+ISSS'06:
Yield Prediction for Architecture Exploration in Nanometer Technology Nodes: A Model and Case Study for Memory Organizations (page 253)
Mitra, T.
CASES'06:
Integrated Scratchpad Memory Optimization and Task Scheduling for MPSoC Architectures (page 401)
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Mochocki, B.
CASES'06:
Methods for Power Optimization in Distributed Embedded Systems with Real-Time Requirements (page 379)
Moon, S.-M.
CASES'06:
Supporting Precise Garbage Collection in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems (page 35)
EMSOFT'06:
Efficient Exception Handling in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems (page 188)
Morales, J. F.
CASES'06:
High-Level Languages for Small Devices: A Case Study (page 271)
Mudge, T.
CASES'06:
FlashCache: A NAND Flash Memory File Cache for Low Power Web Servers (page 103)
Mueller, W.
CODES+ISSS'06:
Tutorial 1: UML and Model-Driven Development for SoC Design (page 1)
Muller, G.
EMSOFT'06:
Energy Adaptation for Multimedia Information Kiosks (page 223)
Muller, H. L.
CASES'06:
High-Level Languages for Small Devices: A Case Study (page 271)
Murali, S.
CODES+ISSS'06:
A
Buffer-Sizing Algorithm for Networks on Chip Using TDMA and Credit-Based
End-to-End Flow Control (page
130)
Muthig, D.
EMSOFT'06:
Defining a Strategy to Introduce a Software Product Line Using Existing Embedded Systems (page 63)
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Nagpal, R.
EMSOFT'06:
Compiler-Assisted Leakage Energy Optimization for Clustered VLIW Architectures (page 233)
Nakada, T.
CASES'06:
An Accurate and Efficient Simulation-Based Analysis for Worst Case Interruption Delay (page 2)
Nakagawa, M.
CODES+ISSS'06:
Pack Instruction Generation for Media Processors Using Multi-valued Decision Diagram (page 154)
Nakashima, H.
CASES'06:
An Accurate and Efficient Simulation-Based Analysis for Worst Case Interruption Delay (page 2)
Nam, Y.
CASES'06:
A Dynamic Code Placement Technique for Scratchpad Memory Using Postpass Optimization (page 223)
Nam, H. J.
CODES+ISSS'06:
Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)
Namkung, J.
CODES+ISSS'06:
Phase Guided Sampling for Efficient Parallel Application Simulation (page 187)
Nghiem, T.
EMSOFT'06:
Time-triggered Implementations of Dynamic Controllers (page 2)
Nicolau, A.
CODES+ISSS'06:
Invited Paper: Challenges in Exploitation of Loop Parallelism in Embedded Applications (page 173)
Nikolov, H.
CODES+ISSS'06:
Multi-processor System Design with ESPAM (page 211)
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O'Boyle, M. F. P.
CASES'06:
Automatic Performance Model Construction for the Fast Software Exploration of New Hardware Designs (page 24)
Orailoglu, A.
CASES'06:
Power Efficient Branch Prediction through Early Identification of Branch Addresses (page 169)
Ota, Y.
CODES+ISSS'06:
Pack Instruction Generation for Media Processors Using Multi-valued Decision Diagram (page 154)
Özer, E.
CASES'06:
Reducing Energy of Virtual Cache Synonym Lookup using Bloom Filters (page 179)
Palem, K. V.
CASES'06:
Probabilistic Arithmetic and Energy Efficient Embedded Signal Processing (page 158)
CASES'06:
Compiler Optimization of Embedded Applications for an Adaptive SoC Architecutre (page 312)
Palesi, M.
CODES+ISSS'06:
A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC Systems (page 142)
CODES+ISSS'06:
Fuzzy Decision Making in Embedded System Design (page 223)
Panainte, E. M.
CODES+ISSS'06:
Automatic Selection of Application-Specific Instruction-Set Extensions (page 160)
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Paolucci, P. S.
CODES+ISSS'06:
Invited Paper: SHAPES: A Tiled Scalable Software Hardware Architecture Platform for Embedded Systems (page 167)
Papanikolaou, A.
CODES+ISSS'06:
Yield Prediction for Architecture Exploration in Nanometer Technology Nodes: A Model and Case Study for Memory Organizations (page 253)
Pappas, G. J.
EMSOFT'06:
Time-triggered Implementations of Dynamic Controllers (page 2)
Parameswaran, S.
CODES+ISSS'06:
Hardware Assisted Pre-emptive Control Flow Checking for Embedded Processors to Improve Reliability (page 100)
CODES+ISSS'06:
Heterogeneous Multiprocessor Implementations for JPEG: A Case Study (page 217)
Parameswaran, S.
CODES+ISSS'06:
Application Specific Forwarding Network and Instruction Encoding for Multi-pipe ASIPs (page 241)
Park, C.
CODES+ISSS'06:
Demand Paging for OneNANDTM Flash eXecute-In-Place (page 229)
Park, H.
CASES'06:
Modulo Graph Embedding: Mapping Applications onto Coarse-Grained Reconfigurable Architectures (page 136)
Park, H.
CODES+ISSS'06:
Increasing Hardware Efficiency with Multifunction Loop Accelerators (page 276)
Park, JK.
CASES'06:
Supporting Precise Garbage Collection in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems (page 35)
Park, JK.
EMSOFT'06:
Efficient Exception Handling in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems (page 188)
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Park, S.-y.
CASES'06:
CFLRU: A Replacement Algorithm for Flash Memory (page 234)
Park, Y.-H.
CODES+ISSS'06:
System-Level Power-Performance Trade-Offs in Bus Matrix Communication Architecture Synthesis (page 300)
Pasricha, S.
CODES+ISSS'06:
System-Level Power-Performance Trade-Offs in Bus Matrix Communication Architecture Synthesis (page 300)
EMSOFT'06:
Formal Performance Evaluation of AMBA-based System-on-Chip Designs (page 311)
Patel, K.
CODES+ISSS'06:
B2Sim: A Fast Micro-Architecture Simulator Based on Basic Block Characterization (page 199)
Patti, D.
CODES+ISSS'06:
Fuzzy Decision Making in Embedded System Design (page 223)
Pedram, M.
CODES+ISSS'06:
B2Sim: A Fast Micro-Architecture Simulator Based on Basic Block Characterization (page 199)
Peh, L.-S.
CASES'06:
High-Level Power Analysis for Multi-Core Chips (page 389)
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Peng, J.
CODES+ISSS'06:
Automatic
Generation of Transaction-Level Models for Rapid Design Space Exploration (page
64)
Poucet, C.
EMSOFT'06:
Energy-Efficient Dynamic Memory Allocators at the Middleware Level of Embedded Systems (page 215)
Pouzet, M.
EMSOFT'06:
Mixing Signals and Modes in Synchronous Data-flow Systems (page 73)
Pozzi, L.
CASES'06:
Code Tranformation Strategies for Extensible Embedded Processors (page 242)
Puebla, G.
CASES'06:
High-Level Languages for Small Devices: A Case Study (page 271)
Puttaswamy, K.
CASES'06:
Entropy-Based Low Power Data TLB Design (page 304)
Qin, W.
CODES+ISSS'06:
A Multiprocessing Approach to Accelerate Retargetable and Portable Dynamic-compiled Instruction-set Simulation (page 193)
Quaglia, D.
CODES+ISSS'06:
TLM/Network
Design Space Exploration for Networked Embedded Systems (page
58)
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Rachlin, E.
EMSOFT'06:
Schedulable Persistence System for Real-Time Applications in Virtual Machine (page 195)
Racu, R.
CASES'06:
Methods for Power Optimization in Distributed Embedded Systems with Real-Time Requirements (page 379)
CODES+ISSS'06:
A
Formal Approach to Robustness Maximization of Complex
Heterogeneous Embedded Systems (page
40)
Radhakrishnan, S.
CODES+ISSS'06:
Application Specific Forwarding Network and Instruction Encoding for Multi-pipe ASIPs (page 241)
Rădulescu, A.
CODES+ISSS'06:
A
Buffer-Sizing Algorithm for Networks on Chip Using TDMA and Credit-Based
End-to-End Flow Control (page
130)
Ragel, R. G.
CODES+ISSS'06:
Hardware Assisted Pre-emptive Control Flow Checking for Embedded Processors to Improve Reliability (page 100)
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Raghavan, C.
CASES'06:
Integrated Scratchpad Memory Optimization and Task Scheduling for MPSoC Architectures (page 401)
Raghunathan, A.
CODES+ISSS'06:
Architectural
Support for Safe Software Execution on Embedded Processors (page
106)
Raman, B.
CODES+ISSS'06:
Application-specific Workload Shaping in Multimedia-enabled Personal Mobile Devices (page 4)
Ravi, S.
CODES+ISSS'06:
Architectural
Support for Safe Software Execution on Embedded Processors (page
106)
Reinman, G.
CASES'06:
Improving the Performance and Power Efficiency of Shared Helpers in CMPs (page 345)
Rengaswamy, R. K.
EMSOFT'06:
Multi-level Software Reconfiguration for Sensor Networks (page 112)
Reshadi, M.
CODES+ISSS'06:
Generic Netlist Representation for System and PE Level Design Exploration (page 282)
Risset, T.
CODES+ISSS'06:
Automatic
Phase Detection for Stochastic On-Chip Traffic Generation (page
88)
Roussel, P.
CODES+ISSS'06:
Yield Prediction for Architecture Exploration in Nanometer Technology Nodes: A Model and Case Study for Memory Organizations (page 253)
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