Embedded Systems Week Author Index
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Sair, S.

CASES'06: Improving the Performance and Power Efficiency of Shared Helpers in CMPs (page 345)


Saito, H.

CODES+ISSS'06: Invited Paper: Challenges in Exploitation of Loop Parallelism in Embedded Applications (page 173)


Sakanushi, K.

CODES+ISSS'06: Pack Instruction Generation for Media Processors Using Multi-valued Decision Diagram (page 154)


Sánchez, C.

EMSOFT'06: Efficient Distributed Deadlock Avoidance with Liveness Guarantees (page 12)

EMSOFT'06: Reusable Models for Timing and Liveness Analysis of Middleware for Distributed Real-Time and Embedded Systems (page 252)


Sangiovanni-Vincentelli, A.

EMSOFT'06: A Hierarchical Coordination Language for Interacting Real-Time Tasks (page 132)

EMSOFT'06: Communication by Sampling in Time-Sensitive Distributed Systems (page 152)


Scherrer, A.

CODES+ISSS'06: Automatic Phase Detection for Stochastic On-Chip Traffic Generation (page 88)


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Schirner, G.

CODES+ISSS'06: Accurate Yet Fast Modeling of Real-Time Communication (page 70)


Schliecker, S.

CODES+ISSS'06: Integrated Analysis of Communicating Tasks in MPSoCs (page 288)


Scholz, B.

CASES'06: Minimizing Bank Selection Instructions for Partitioned Memory Architectures (page 201)


Schumacher, C.

CODES+ISSS'06: Retargetable Code Optimization with SIMD Instructions (page 148)


Sciuto, D.

CODES+ISSS'06: Decision-theoretic Exploration of Multi-Processor Platforms (page 205)


Seghir, R.

CASES'06: Memory Optimization by Counting Points in Integer Transformations of Parametric Polytopes (page 74)


Shahbahrami, A.

CASES'06: Limitations of Special-Purpose Instructions for Similarity Measurements in Media SIMD Extensions (page 293)


Shayesteh, A.

CASES'06: Improving the Performance and Power Efficiency of Shared Helpers in CMPs (page 345)


Shee, S. L.

CODES+ISSS'06: Heterogeneous Multiprocessor Implementations for JPEG: A Case Study (page 217)


Sherwood, T.

CASES'06: Extensible Control Architectures (page 323)

CASES'06: Improving the Performance and Power Efficiency of Shared Helpers in CMPs (page 345)

CASES'06: A Case Study of Multi-Threading in the Embedded Space (page 357)


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Shin, D.

CODES+ISSS'06: Automatic Generation of Transaction-Level Models for Rapid Design Space Exploration (page 64)


Shin, H.

EMSOFT'06: Scratchpad Memory Management for Portable Systems with a Memory Management Unit (page 321)


Shin, I.

EMSOFT'06: Incremental Schedulability Analysis of Hierarchical Real-Time Components (page 272)


Shrivastava, A.

CASES'06: Mitigating Soft Error Failures for Multimedia Applications by Selective Data Protection (page 411)


Silvano, C.

CODES+ISSS'06: Decision-theoretic Exploration of Multi-Processor Platforms (page 205)


Sipma, H. B.

EMSOFT'06: Efficient Distributed Deadlock Avoidance with Liveness Guarantees (page 12)


Sipma, H. B.

EMSOFT'06: Reusable Models for Timing and Liveness Analysis of Middleware for Distributed Real-Time and Embedded Systems (page 252)


Slomka, F.

CODES+ISSS'06: Battery Discharge Aware Energy Feasibility Analysis (page 22)


Smit, G.

CODES+ISSS'06: Efficient Computation of Buffer Capacities for Multi-Rate Real-Time Systems with Back-Pressure (page 10)


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So, H. K.-H.

CODES+ISSS'06: A Unified Hardware/Software Runtime Environment for FPGA-Based Reconfigurable Computers Using BORPH (page 259)


So, W.

CASES'06: Reaching Fast Code Faster: Using Modeling for Efficient Software Thread Integration on a VLIW DSP (page 13)


Sofronis, C.

EMSOFT'06: A Memory-Optimal Buffering Protocol for Preservation of Synchronous Semantics under Preemptive Scheduling (page 21)


Sokolsky, O.

EMSOFT'06: Incremental Schedulability Analysis of Hierarchical Real-Time Components (page 272)


Song, D.

CODES+ISSS'06: Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)


Soteriou, V.

CASES'06: High-Level Power Analysis for Multi-Core Chips (page 389)


Soudris, D.

EMSOFT'06: Energy-Efficient Dynamic Memory Allocators at the Middleware Level of Embedded Systems (page 215)


Sowmya, A.

EMSOFT'06: A Timing Model for Synchronous Language Impementations in Simulink (page 93)


Srikant, Y. N.

EMSOFT'06: Compiler-Assisted Leakage Energy Optimization for Clustered VLIW Architectures (page 233)


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Srinivasan, K.

CODES+ISSS'06: Layout Aware Design of Mesh Based NoC Architectures (page 136)


Srivastava, M.

EMSOFT'06: Multi-level Software Reconfiguration for Sensor Networks (page 112)


Stefanov, T.

CODES+ISSS'06: Multi-processor System Design with ESPAM (page 211)


Stoimenov, N.

EMSOFT'06: Real-Time Interfaces for Composing Real-Time Systems (page 34)


Strozek, L.

CASES'06: Efficient Architectures through Application Clustering and Architectural Heterogeneity (page 190)


Subramonian, V.

EMSOFT'06: Reusable Models for Timing and Liveness Analysis of Middleware for Distributed Real-Time and Embedded Systems (page 252)


Suhendra, V.

CASES'06: Integrated Scratchpad Memory Optimization and Task Scheduling for MPSoC Architectures (page 401)


Sztipanovits, J.

EMSOFT'06: Towards A Formal Foundation For Domain Specific Modeling Languages (page 53)


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Takeuchi, Y.

CODES+ISSS'06: Pack Instruction Generation for Media Processors Using Multi-valued Decision Diagram (page 154)


Talpin, J.-P.

EMSOFT'06: Polychronous Mode Automata (page 83)


Tang, X.

CASES'06: High-performance Packet Classification Algorithm for Many-core and Multithreaded Network Processor (page 334)


Tardieu, O.

EMSOFT'06: Scheduling-Independent Threads and Exceptions in SHIM (page 142)


Teich, J.

CODES+ISSS'06: Are Current ESL Tools Meeting the Requirements of Advanced Embedded Systems? (page 166)


Temam, O.

CASES'06: Automatic Performance Model Construction for the Fast Software Exploration of New Hardware Designs (page 24)


Thesing, S.

EMSOFT'06: Modeling a System Controller for Timing Analysis (page 292)


Thiele, L.

CODES+ISSS'06: Invited Paper: SHAPES: A Tiled Scalable Software Hardware Architecture Platform for Embedded Systems (page 167)

EMSOFT'06: Real-Time Interfaces for Composing Real-Time Systems (page 34)


Tian, X.

CODES+ISSS'06: Invited Paper: Challenges in Exploitation of Loop Parallelism in Embedded Applications (page 173)


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Tkachenko, A.

CODES+ISSS'06: A Unified Hardware/Software Runtime Environment for FPGA-Based Reconfigurable Computers Using BORPH (page 259)


Tripakis, S.

EMSOFT'06: A Memory-Optimal Buffering Protocol for Preservation of Synchronous Semantics under Preemptive Scheduling (page 21)

EMSOFT'06: Communication by Sampling in Time-Sensitive Distributed Systems (page 152)


Tsigkogiannis, I.

EMSOFT'06: Multi-level Software Reconfiguration for Sensor Networks (page 112)


Tyagi, A.

CASES'06: State Space Reconfigurability: An Implementation Architecture for Self Modifying Finite Automata (page 83)


Tyson, G.

CASES'06: Adapting Compilation Techniques to Enhance the Packing of Instructions into Registers (page 43)


Urunuela, R.

EMSOFT'06: Energy Adaptation for Multimedia Information Kiosks (page 223)


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Vaandrager, F.

EMSOFT'06: Analysis of the Zeoconf Protocol Using UPPAAL (page 242)


van Someren, H.

CODES+ISSS'06: Retargetable Code Optimization with SIMD Instructions (page 148)


Vanderperren, Y.

CODES+ISSS'06: Tutorial 1: UML and Model-Driven Development for SoC Design (page 1)


Varma, A.

CASES'06: Modeling Heterogeneous SoCs with SystemC: A Digital/MEMS Case Study (page 54)


Vassiliadis, S.

CASES'06: Limitations of Special-Purpose Instructions for Similarity Measurements in Media SIMD Extensions (page 293)


Vassiliadis, S.

CODES+ISSS'06: Automatic Selection of Application-Specific Instruction-Set Extensions (page 160)


Veidenbaum, A. V.

CODES+ISSS'06: Invited Paper: Challenges in Exploitation of Loop Parallelism in Embedded Applications (page 173)


Venkatasubramanian, N.

CODES+ISSS'06: Design Space Exploration of Real-time Multi-media MPSoCs with Heterogeneous Scheduling Policies (page 16)

CASES'06: Mitigating Soft Error Failures for Multimedia Applications by Selective Data Protection (page 411)


Vicini, P.

CODES+ISSS'06: Invited Paper: SHAPES: A Tiled Scalable Software Hardware Architecture Platform for Embedded Systems (page 167)


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Wandeler, E.

EMSOFT'06: Real-Time Interfaces for Composing Real-Time Systems (page 34)


Ward, M.

CASES'06: Syntax-Driven Implementation of Software Programming Language Control Constructs and Expressions on FPGAs (page 253)


Wei, G.-Y.

CASES'06: Architecture and Circuit Techniques for Low-Throughput, Energy-Constrained Systems Across Technology Generations (page 368)


Weiss, G.

CODES+ISSS'06: Bounded Arbitration Algorithm for QoS-Supported On-chip Communication (page 76)


Wen, Y.

EMSOFT'06: S2DB: A Novel Simulation-Based Debugger for Sensor Network Applications (page 102)


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Whalley, D.

CASES'06: Adapting Compilation Techniques to Enhance the Packing of Instructions into Registers (page 43)


White, B. A.

CODES+ISSS'06: Methodology for Attack on a Java-based PDA (page 94)


Wiggers, M.

CODES+ISSS'06: Efficient Computation of Buffer Capacities for Multi-Rate Real-Time Systems with Back-Pressure (page 10)


Wolski, R.

EMSOFT'06: S2DB: A Novel Simulation-Based Debugger for Sensor Network Applications (page 102)


Woo, D. H.

CASES'06: Reducing Energy of Virtual Cache Synonym Lookup using Bloom Filters (page 179)


Woo, N.-S.

CODES+ISSS'06: Keynote: Promises and Challenges of Mobile Embedded System: An Industry Perspective (page 3)


Xu, T.

CODES+ISSS'06: Droplet-Trace-Based Array Partitioning and a Pin Assignment Algorithm for the Automated Design of Digital Microfluidic Biochips (page 112)


Xue, J.

CASES'06: Minimizing Bank Selection Instructions for Partitioned Memory Architectures (page 201)


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Yang, C.

CASES'06: Power Efficient Branch Prediction through Early Identification of Branch Addresses (page 169)


Yang, L.

CASES'06: Automated Compile-Time and Run-Time Techniques to Increase Usable Memory in MMU-Less Embedded Systems (page 125)


Yankova, Y.

CODES+ISSS'06: Automatic Selection of Application-Specific Instruction-Set Extensions (page 160)


Yehia, S.

CASES'06: Scalable Subgraph Mapping for Acyclic Computation Accelerators (page 147)


Yoo, B.-S.

CODES+ISSS'06: Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)


Yoo, S.

CODES+ISSS'06: Creation and Utilization of a Virtual Platform for Embedded Software Optimization: An Industrial Case Study (page 235)


Yoshimura, K.

EMSOFT'06: Defining a Strategy to Introduce a Software Product Line Using Existing Embedded Systems (page 63)


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Zhang, M.

EMSOFT'06: Analysis of the Zeoconf Protocol Using UPPAAL (page 242)


Zhou, Y.

EMSOFT'06: A Causality Interface for Deadlock Analysis in Dataflow (page 44)


Zhu, Q.

EMSOFT'06: Formal Performance Evaluation of AMBA-based System-on-Chip Designs (page 311)


Zhu, X.

CODES+ISSS'06: A Multiprocessing Approach to Accelerate Retargetable and Portable Dynamic-compiled Instruction-set Simulation (page 193)