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Embedded
Systems Week Author Index
Ha, Soonhoi
CASES’07:
Performance Evaluation and Optimization of Dual-Port SDRAM Architecture for Mobile Embedded Systems (page 53)
Hahn, Jiwon
EMSOFT’07:
Buffer Optimization and Dispatching Scheme for Embedded Systems with Behavioral Transparency (page 94)
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Haid, Wolfgang
CODES+ISSS’07:
Complex Task Activation Schemes in System Level Performance Analysis (page 173)
Haider, Syed Imtiaz
CASES’07:
A Hybrid Code Compression Technique using Bitmask and Prefix Encoding with Enhanced Dictionary Selection (page 58)
Halbwachs, Nicolas
EMSOFT’07:
Virtual Execution of AADL Models via a Translation into Synchronous Programs (page 134)
Hamann, Arne
CODES+ISSS’07:
Combined Approach to System Level Performance Analysis of Embedded Systems (page 63)
CODES+ISSS’07:
Improved Response Time Analysis of Tasks Scheduled under Preemptive Round-Robin (page 179)
EMSOFT’07:
Influence of Different System Abstractions on the Performance Analysis of Distributed Real-Time Systems (page 193)
EMSOFT’07:
Methods for Multi-Dimensional Robustness Optimization in Complex Embedded Systems (page 104)
Han, Guoling
CODES+ISSS’07:
Performance Modeling for Early Analysis of Multi-Core Systems (page 209)
Hansson, Andreas
CODES+ISSS’07:
Channel Trees: Reducing Latency by Sharing Time Slots in Time-Multiplexed Networks on Chip (page 149)
Hart, Darren
EMSOFT’07:
Design and Implementation of a Comprehensive Real-time Java Virtual Machine (page 249)
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He, Haifeng
EMSOFT’07:
The Revenge of the Overlay: Automatic Compaction of OS Kernel Code via On-Demand Code Loading (page 75)
Heiser, Gernot
EMSOFT’07:
Accurate On-line Prediction of Processor and Memory Energy Usage Under Voltage Scaling (page 84)
EMSOFT’07:
Panel -- Grand Challenges in Embedded Software (page 2)
Henia, Rafik
CODES+ISSS’07:
Improved Response Time Analysis of Tasks Scheduled under Preemptive Round-Robin (page 179)
EMSOFT’07:
Influence of Different System Abstractions on the Performance Analysis of Distributed Real-Time Systems (page 193)
Hines, Stephen
CASES’07:
Facilitating Compiler Optimizations through the Dynamic Mapping of Alternate Register Structures (page 165)
Hiser, Jason D.
CASES’07:
Fragment Cache Management for Dynamic Binary Translators in Embedded Systems with Scratchpad (page 75)
Hoover, Greg
CASES’07:
Towards Understanding Architectural Tradeoffs in MEMS Closed-Loop Feedback Control (page 95)
Hsiung, Pao-Ann
CODES+ISSS’07:
Energy Efficient Co-scheduling in Dynamically Reconfigurable Systems (page 87)
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Huynh, Huynh Phung
CASES’07:
An Efficient Framework for Dynamic Reconfiguration of Instruction-Set Customization (page 135)
Hyun, Choulseung
EMSOFT’07:
Block Recycling Schemes and Their Cost-Based Optimization in NAND Flash Memory Based Storage System (page 174)
Ienne, Paolo
CASES’07:
An Optimistic and Conservative Register Assignment Heuristic for Chordal Graphs (page 209)
CASES’07:
Rethinking Custom ISE Identification: A New Processor-Agnostic Method (page 125)
Ikeno, Akihisa
CODES+ISSS’07:
Dynamic Security Domain Scaling on Symmetric Multiprocessors for Future High-End Embedded Systems (page 39)
Imai, Masaharu
CODES+ISSS’07:
A Low Power VLIW Processor Generation Method by Means of Extracting Non-redundant Activation Conditions (page 227)
Inoue, Hiroaki
CODES+ISSS’07:
Dynamic Security Domain Scaling on Symmetric Multiprocessors for Future High-End Embedded Systems (page 39)
Issenin, Ilya
CASES’07:
Software Controlled Memory Layout Reorganization for Irregular Array Access Patterns (page 179)
Iwato, Hirofumi
CODES+ISSS’07:
A Low Power VLIW Processor Generation Method by Means of Extracting Non-redundant Activation Conditions (page 227)
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Izosimov, Viacheslav
CODES+ISSS’07:
Scheduling and Voltage Scaling for Energy/Reliability Trade-offs in Fault-Tolerant Time-Triggered Embedded Systems (page 233)
Jahier, Erwan
EMSOFT’07:
Virtual Execution of AADL Models via a Translation into Synchronous Programs (page 134)
Janssen, Geert
CODES+ISSS’07:
Performance Modeling for Early Analysis of Multi-Core Systems (page 209)
Jantsch, Axel
CODES+ISSS’07:
Performance Analysis and Design Space Exploration for High-End Biomedical Applications: Challenges and Solutions (page 217)
CODES+ISSS’07:
Synchronization after Design Refinements with Sensitive Delay Elements (page 21)
Jayapala, Murali
CODES+ISSS’07:
Locality Optimization in Wireless Applications (page 125)
Jersak, Marek
CODES+ISSS’07:
Automotive Networks—Are New Busses and Gateways the Answer or Just Another Challenge? (page 263)
JI, Weixing
CASES’07:
A Self-Maintained Memory Module Supporting DMM (page 189)
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Jinturkar, Sanjay
CASES’07:
An Integrated ARM and Multi-core DSP Simulator (page 33)
Jo, Heeseung
CASES’07:
A Group-Based Wear-Leveling Algorithm for Large-Capacity Flash Memory Storage Systems (page 160)
Joseph, Russ
CODES+ISSS’07:
Power Deregulation: Eliminating Off-Chip Voltage Regulation Circuitry From Embedded Systems (page 105)
Jung, Changhee
EMSOFT’07:
Performance Characterization of Prelinking and Preloading for Embedded Systems (page 213)
Jung, Dawoon
CASES’07:
A Group-Based Wear-Leveling Algorithm for Large-Capacity Flash Memory Storage Systems (page 160)
EMSOFT’07:
μ-Tree: An Ordered Index Structure for NAND Flash Memory (page 144)
Kaiabachev, Roumen
EMSOFT’07:
E-FRP With Priorities (page 221)
Kandemir, Mahmut
CASES’07:
Lightweight Barrier-Based Parallelization Support for Non-Cache-Coherent MPSoC Platforms (page 145)
Kang, Dongwon
EMSOFT’07:
μ-Tree: An Ordered Index Structure for NAND Flash Memory (page 144)
Kang, Jeong-Uk
EMSOFT’07:
μ-Tree: An Ordered Index Structure for NAND Flash Memory (page 144)
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Kim, Jin-Soo
CASES’07:
A Group-Based Wear-Leveling Algorithm for Large-Capacity Flash Memory Storage Systems (page 160)
EMSOFT’07:
μ-Tree: An Ordered Index Structure for NAND Flash Memory (page 144)
Kim, Jinwoo
CASES’07:
Performance Evaluation and Optimization of Dual-Port SDRAM Architecture for Mobile Embedded Systems (page 53)
Kim, Kanghee
EMSOFT’07:
Performance Characterization of Prelinking and Preloading for Embedded Systems (page 213)
Kim, Seunghoon
CODES+ISSS’07:
Power Deregulation: Eliminating Off-Chip Voltage Regulation Circuitry From Embedded Systems (page 105)
Kim, Sungchan
CASES’07:
Performance Evaluation and Optimization of Dual-Port SDRAM Architecture for Mobile Embedded Systems (page 53)
Kim, Sunghoon
EMSOFT’07:
Block Recycling Schemes and Their Cost-Based Optimization in NAND Flash Memory Based Storage System (page 174)
Kirner, Raimund
CASES’07:
SCCP/x - A Compilation Profile to Support Testing and Verification of Optimized Code (page 38)
Kirsch, Christoph M.
EMSOFT’07:
Panel -- Grand Challenges in Embedded Software (page 2)
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Klingauf, Wolfgang
CODES+ISSS’07:
Embedded Software Development on Top of Transaction-Level Models (page 27)
Ko, Ming-Yung
CASES’07:
An Integrated ARM and Multi-core DSP Simulator (page 33)
Kopetz, Herman
CODES+ISSS’07:
Automotive Networks—Are New Busses and Gateways the Answer or Just Another Challenge? (page 263)
Kozyrakis, Christos
CASES’07:
A Low Power Front-End for Embedded Processors Using a Block-Aware Instruction Set (page 267)
Kraemer, Stefan
CASES’07:
A Fast and Generic Hybrid Simulation Approach Using C Virtual Machine (page 3)
CODES+ISSS’07:
HySim: A Fast Simulation Framework for Embedded Software Development (page 75)
Krall, Andreas
CASES’07:
Compiler Generation from Structural Architecture Descriptions (page 13)
Kucar, Dorothy
CODES+ISSS’07:
Performance Modeling for Early Analysis of Multi-Core Systems (page 209)
Kudlur, Manjunath
CASES’07:
Hierarchical Coarse-grained Stream Compilation for Software Defined Radio (page 115)
Kulkarni, Prasad
CASES’07:
Facilitating Compiler Optimizations through the Dynamic Mapping of Alternate Register Structures (page 165)
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Künzli, Simon
CODES+ISSS’07:
Combined Approach to System Level Performance Analysis of Embedded Systems (page 63)
Kwon, Hunki
EMSOFT’07:
Block Recycling Schemes and Their Cost-Based Optimization in NAND Flash Memory Based Storage System (page 174)
Lambrechts, Andy
CODES+ISSS’07:
Locality Optimization in Wireless Applications (page 125)
Leary, Glenn
CODES+ISSS’07:
Performance and Resource Optimization of NoC Router Architecture for Master and Slave IP Cores (page 155)
Lee, Donghee
EMSOFT’07:
Block Recycling Schemes and Their Cost-Based Optimization in NAND Flash Memory Based Storage System (page 174)
EMSOFT’07:
Exploiting Non-Volatile RAM to Enhance Flash File System Performance (page 164)
EMSOFT’07:
Uniformity Improving Page Allocation for Flash Memory File Systems (page 154)
Lee, Edward A.
EMSOFT’07:
Leveraging Synchronous Language Principles for Heterogeneous Modeling and Design of Embedded Systems (page 114)
EMSOFT’07:
Panel -- Grand Challenges in Embedded Software (page 2)
Lee, Insup
EMSOFT’07:
A Dynamic Scheduling Approach to Designing Flexible Safety-Critical Systems (page 67)
Lee, Jaejin
EMSOFT’07:
Panel -- Grand Challenges in Embedded Software (page 2)
Lee, Jongmin
EMSOFT’07:
Block Recycling Schemes and Their Cost-Based Optimization in NAND Flash Memory Based Storage System (page 174)
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Lee, Joonwon
CASES’07:
A Group-Based Wear-Leveling Algorithm for Large-Capacity Flash Memory Storage Systems (page 160)
Lesens, David
EMSOFT’07:
Virtual Execution of AADL Models via a Translation into Synchronous Programs (page 134)
Leupers, Rainer
CODES+ISSS’07:
A Code-Generator Generator for Multi-Output Instructions (page 131)
CASES’07:
A Fast and Generic Hybrid Simulation Approach Using C Virtual Machine (page 3)
CODES+ISSS’07:
HySim: A Fast Simulation Framework for Embedded Software Development (page 75)
Li, Li
CODES+ISSS’07:
Improved Response Time Analysis of Tasks Scheduled under Preemptive Round-Robin (page 179)
Li, Min
CODES+ISSS’07:
Locality Optimization in Wireless Applications (page 125)
Lim, Sung-Soo
EMSOFT’07:
Performance Characterization of Prelinking and Preloading for Embedded Systems (page 213)
Lin, Yuan
CASES’07:
Hierarchical Coarse-grained Stream Compilation for Software Defined Radio (page 115)
Liu, Chih-Wen
CODES+ISSS’07:
Energy Efficient Co-scheduling in Dynamically Reconfigurable Systems (page 87)
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Liu, Jane W. S.
EMSOFT’07:
User-Centered Semiautomatic Assistive Devices (page 1)
Lokuciejewski, Paul
CODES+ISSS’07:
Influence of Procedure Cloning on WCET Prediction (page 137)
Lombardi, Michele
EMSOFT’07:
Communication-Aware Stochastic Allocation and Scheduling Framework for Conditional Task Graphs in Multi-Processor Systems-on-Chip (page 47)
Lu, Pin-Hsien
CODES+ISSS’07:
Energy Efficient Co-scheduling in Dynamically Reconfigurable Systems (page 87)
Lukovic, Slobodan
CODES+ISSS’07:
A Data Protection Unit for NoC-based Architectures (page 167)
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