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Embedded
Systems Week Author Index
Saghir, Mazen A. R.
CASES’07:
Supporting Multithreading in Configurable Soft Processor Cores (page 155)
Sakai, Junji
CODES+ISSS’07:
Dynamic Security Domain Scaling on Symmetric Multiprocessors for Future High-End Embedded Systems (page 39)
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Sakanushi, Keishi
CODES+ISSS’07:
A Low Power VLIW Processor Generation Method by Means of Extracting Non-redundant Activation Conditions (page 227)
Sander, Ingo
CODES+ISSS’07:
Synchronization after Design Refinements with Sensitive Delay Elements (page 21)
Sangiovanni Vincentelli, Alberto
EMSOFT’07:
Loosely Time-Triggered Architectures Based on Communication-by-Sampling (page 231)
EMSOFT’07:
A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and Its Application to Building Automation and Control (page 21)
CODES+ISSS’07:
Fresh Air: The Emerging Landscape of Design for Networked Embedded Systems (page 124)
CODES+ISSS’07:
Automotive Networks—Are New Busses and Gateways the Answer or Just Another Challenge? (page 263)
Santana, Miguel
CASES’07:
Non-Transparent Debugging for Software-Pipelined Loops (page 23)
Schaeckeler, Stefan
CASES’07:
Stack Size Reduction of Recursive Programs (page 48)
Scharwaechter, Hanno
CODES+ISSS’07:
A Code-Generator Generator for Multi-Output Instructions (page 131)
Schaumont, Patrick
CODES+ISSS’07:
Secure FPGA Circuits Using Controlled Placement and Routing (page 45)
Schliecker, Simon
EMSOFT’07:
Influence of Different System Abstractions on the Performance Analysis of Distributed Real-Time Systems (page 193)
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Schröder, Christian
CODES+ISSS’07:
Embedded Software Development on Top of Transaction-Level Models (page 27)
Schuster, T.
CODES+ISSS’07:
ESL Design and HW/SW Co-verification of High-end Software Defined Radio Platforms (page 191)
Schwarz, Markus
CODES+ISSS’07:
Probabilistic Performance Risk Analysis at System-Level (page 185)
Schwarzer, Martin
CODES+ISSS’07:
Influence of Procedure Cloning on WCET Prediction (page 137)
Sen, Rathijit
EMSOFT’07:
WCET Estimation for Executables in the Presence of Data Caches (page 203)
Shang, Li
CODES+ISSS’07:
Reliable Multiprocessor System-On-Chip Synthesis (page 239)
CODES+ISSS’07:
Three-Dimensional Multiprocessor System-on-Chip Thermal Optimization (page 117)
Shang, Weijia
CASES’07:
Stack Size Reduction of Recursive Programs (page 48)
Shee, Seng Lin
CODES+ISSS’07:
Ensuring Secure Program Execution in Multiprocessor Embedded Systems: A Case Study (page 57)
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Sherwood, Timothy
CASES’07:
Towards Understanding Architectural Tradeoffs in MEMS Closed-Loop Feedback Control (page 95)
Shi, Feng
CASES’07:
A Self-Maintained Memory Module Supporting DMM (page 189)
Shin, Insik
EMSOFT’07:
SIRAP: A Synchronization Protocol for Hierarchical Resource Sharingin Real-Time Open Systems (page 279)
Shrivastava, Aviral
CODES+ISSS’07:
Smart Driver for Power Reduction in Next Generation Bistable Electrophoretic Display Technology (page 197)
Sifakis, Joseph
EMSOFT’07:
Panel -- Grand Challenges in Embedded Software (page 2)
EMSOFT’07:
The Algebra of Connectors — Structuring Interaction in BIP (page 11)
Silvano, Cristina
CODES+ISSS’07:
A Data Protection Unit for NoC-based Architectures (page 167)
Sim, Joon Edward
CASES’07:
An Efficient Framework for Dynamic Reconfiguration of Instruction-Set Customization (page 135)
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Singhai, Sharad
CASES’07:
An Integrated ARM and Multi-core DSP Simulator (page 33)
Snowdon, David C.
EMSOFT’07:
Accurate On-line Prediction of Processor and Memory Energy Usage Under Voltage Scaling (page 84)
Sonalkar, Sampada
EMSOFT’07:
Existential Abstractions for Distributed Reactive Systems via Syntactic Transformations (page 240)
Sorel, Yves
EMSOFT’07:
Necessary and Sufficient Conditions for Deterministic Desynchronization (page 124)
Spiegelberg, Gernot
CODES+ISSS’07:
Automotive Networks—Are New Busses and Gateways the Answer or Just Another Challenge? (page 263)
Srikant, Y. N.
CASES’07:
INTACTE: An Interconnect Area, Delay, and Energy Estimation Tool for Microarchitectural Explorations (page 238)
EMSOFT’07:
WCET Estimation for Executables in the Presence of Data Caches (page 203)
Stefanov, Todor
CODES+ISSS’07:
A Framework for Rapid System-level Exploration, Synthesis, and Programming of Multimedia MP-SoCs (page 9)
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Stitt, Greg
CODES+ISSS’07:
Thread Warping: A Framework for Dynamic Synthesis of Thread Accelerators (page 93)
Stoodley, Mark
EMSOFT’07:
Design and Implementation of a Comprehensive Real-time Java Virtual Machine (page 249)
Sun, Chong
CODES+ISSS’07:
Three-Dimensional Multiprocessor System-on-Chip Thermal Optimization (page 117)
Taha, Walid
EMSOFT’07:
E-FRP With Priorities (page 221)
Takeuchi, Yoshinori
CODES+ISSS’07:
A Low Power VLIW Processor Generation Method by Means of Extracting Non-redundant Activation Conditions (page 227)
Tarazona, Luis A.
CASES’07:
Performance-Driven Syntax-Directed Synthesis of Asynchronous Processors (page 43)
Taylor, Sam
CASES’07:
Performance-Driven Syntax-Directed Synthesis of Asynchronous Processors (page 43)
Theiling, Henrik
CODES+ISSS’07:
Compile-Time Decided Instruction Cache Locking Using Worst-Case Execution Paths (page 143)
CODES+ISSS’07:
Influence of Procedure Cloning on WCET Prediction (page 137)
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Thiele, Lothar
CODES+ISSS’07:
Combined Approach to System Level Performance Analysis of Embedded Systems (page 63)
CODES+ISSS’07:
Complex Task Activation Schemes in System Level Performance Analysis (page 173)
EMSOFT’07:
Influence of Different System Abstractions on the Performance Analysis of Distributed Real-Time Systems (page 193)
EMSOFT’07:
Panel -- Grand Challenges in Embedded Software (page 2)
EMSOFT’07:
Tutorial -- Performance Analysis of Distributed Embedded Systems (page 10)
Thomas, Donald E.
CODES+ISSS’07:
Event-based Re-training of Statistical Contention Models for Heterogeneous Multiprocessors (page 69)
CODES+ISSS’07:
Simultaneous Synthesis of Buses, Data Mapping and Memory Allocation for MPSoC (page 3)
Thompson, Mark
CODES+ISSS’07:
A Framework for Rapid System-level Exploration, Synthesis, and Programming of Multimedia MP-SoCs (page 9)
Titzer, Ben L.
CASES’07:
Vertical Object Layout and Compression for Fixed Heaps (page 170)
Traulsen, Claus
CODES+ISSS’07:
HW/SW Co-Design for Esterel Processing (page 99)
Tripakis, Stavros
EMSOFT’07:
Loosely Time-Triggered Architectures Based on Communication-by-Sampling (page 231)
Tyson, Gary
CASES’07:
Facilitating Compiler Optimizations through the Dynamic Mapping of Alternate Register Structures (page 165)
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Vahid, Frank
CODES+ISSS’07:
Thread Warping: A Framework for Dynamic Synthesis of Thread Accelerators (page 93)
Valente, Frederico
EMSOFT’07:
Scheduling Multiple Independent Hard-Real-Time Jobs on a Heterogeneous Multiprocessor (page 57)
Van der Perre, L.
CODES+ISSS’07:
ESL Design and HW/SW Co-verification of High-end Software Defined Radio Platforms (page 191)
Vandecappelle, Arnout
CODES+ISSS’07:
Locality Optimization in Wireless Applications (page 125)
Vander Aa, Tom
CASES’07:
A Backtracking Instruction Scheduler using Predicate-based Code Hoisting to Fill Delay Slots (page 229)
Veidenbaum, Alexander V.
CASES’07:
A Simplified Java Bytecode Compilation System for Resource-Constrained Embedded Processors (page 218)
Venturini, Hugo
CASES’07:
Non-Transparent Debugging for Software-Pipelined Loops (page 23)
Verma, Ajay K.
CASES’07:
An Optimistic and Conservative Register Assignment Heuristic for Chordal Graphs (page 209)
CASES’07:
Rethinking Custom ISE Identification: A New Processor-Agnostic Method (page 125)
Viehl, Alexander
CODES+ISSS’07:
Probabilistic Performance Risk Analysis at System-Level (page 185)
von Hanxleden, Reinhard
CODES+ISSS’07:
HW/SW Co-Design for Esterel Processing (page 99)
Vrudhula, Sarma
CASES’07:
Performance Optimal Processor Throttling Under Thermal Constraints (page 257)
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Wandeler, Ernesto
EMSOFT’07:
Influence of Different System Abstractions on the Performance Analysis of Distributed Real-Time Systems (page 193)
Weber, Thomas
CODES+ISSS’07:
Automotive Networks—Are New Busses and Gateways the Answer or Just Another Challenge? (page 263)
Weijers, J. W.
CODES+ISSS’07:
ESL Design and HW/SW Co-verification of High-end Software Defined Radio Platforms (page 191)
Weinstock, Jan
CODES+ISSS’07:
HySim: A Fast Simulation Framework for Embedded Software Development (page 75)
Whalley, David
CASES’07:
Facilitating Compiler Optimizations through the Dynamic Mapping of Alternate Register Structures (page 165)
Wilhelm, Reinhard
EMSOFT’07:
Panel -- Grand Challenges in Embedded Software (page 2)
Woo, Duk-Kyun
EMSOFT’07:
Performance Characterization of Prelinking and Preloading for Embedded Systems (page 213)
Xu, Ruibin
EMSOFT’07:
A Unified Practical Approach to Stochastic DVS Scheduling (page 37)
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Yang, Chengmo
CASES’07:
Light-weight Synchronization for Inter-processor Communication Acceleration on Embedded MPSoCs (page 150)
Yang, Chengmo
CODES+ISSS’07:
Predictable Execution Adaptivity through Embedding Dynamic Reconfigurability into Static MPSoC Schedules (page 15)
Yang, Chia-Lin
CASES’07:
Cache Leakage Control Mechanism for Hard Real-Time Systems (page 248)
Yang, Hoeseok
CASES’07:
Performance Evaluation and Optimization of Dual-Port SDRAM Architecture for Mobile Embedded Systems (page 53)
Yoon, Jonghee W.
CASES’07:
Software Controlled Memory Layout Reorganization for Irregular Array Access Patterns (page 179)
Youn, Jonghee M.
CODES+ISSS’07:
A Code-Generator Generator for Multi-Output Instructions (page 131)
Yu, Chenjie
CODES+ISSS’07:
Aggressive Snoop Reduction for Synchronized Producer-Consumer Communication in Energy-Efficient Embedded Multi-Processors (page 245)
Yu, Pengyuan
CODES+ISSS’07:
Secure FPGA Circuits Using Controlled Placement and Routing (page 45)
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Zheng, Haiyang
EMSOFT’07:
Leveraging Synchronous Language Principles for Heterogeneous Modeling and Design of Embedded Systems (page 114)
Zhu, Angela
EMSOFT’07:
E-FRP With Priorities (page 221)
Zhu, Changyun
CODES+ISSS’07:
Reliable Multiprocessor System-On-Chip Synthesis (page 239)
Zimmer, Chris
CASES’07:
Facilitating Compiler Optimizations through the Dynamic Mapping of Alternate Register Structures (page 165)
Zmily, Ahmad
CASES’07:
A Low Power Front-End for Embedded Processors Using a Block-Aware Instruction Set (page 267)
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