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Abdelwahed,
S.
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Model-based Analysis of Distributed Real-time Embedded System Composition
(Page 371)
Ahluwalia, J.
Model-Based Run-Time Monitoring of End-to-End Deadlines
(Page 100)
Anand, M.
Distributed-Code Generation from Hybrid Systems Models for Time-delayed Multirate Systems
(Page 210)
Avasare, P.
Centralized End-to-End Flow Control in a Best-Effort Network-on-Chip
(Page 17)
Azevedo, A.
High Performance Annotation-aware JVM for Java Cards
(Page 52)
Bacon,
D. F.
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High-level Real-time Programming in Java
(Page 68)
Baleani, M.
Efficient Embedded Software Design with Synchronous Models
(Page 187)
Bambha, N. K.
Communication Strategies for Shared-Bus Embedded Multiprocessors
(Page 21)
Benveniste, A.
Tag Machines
(Page 255)
Bhattacharyya, S. S.
Communication Strategies for Shared-Bus Embedded Multiprocessors
(Page 21)
Bocchio, S.
A UML 2.0 Profile for SystemC: Toward High-level SoC Design
(Page 138)
Böke, C.
Dynamic Online Reconfiguration for Customizable and Self-Optimizing Operating Systems
(Page 335)
Bonivento, A.
Rialto: a Bridge between Description and Implementation of Control Algorithms for Wireless Sensor Networks
(Page 183)
Bouchhima, A.
A Unified HW/SW Interface Model to Remove Discontinuities between HW and SW Design
(Page 159)
Caillaud,
B.
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Tag Machines
(Page 255)
From Multi-clocked Synchronous Processes to Latency-insensitive Modules
(Page 282)
Cao, Q.
Dual Face Phased Array Radar Scheduling with Multiple Constraints
(Page 361)
Carloni, L. P.
Rialto: a Bridge between Description and Implementation of Control Algorithms for Wireless Sensor Networks
(Page 183)
Tag Machines
(Page 255)
Caspi, P.
Semantics-Preserving and Memory-Efficient Implementation of Inter-Task Communication on Static-Priority or EDF Schedulers
(Page 353)
Cesário, W. O.
A Unified HW/SW Interface Model to Remove Discontinuities between HW and SW Design
(Page 159)
Chen, G.
Exploiting Last Idle Periods of Links for Network Power Management
(Page 134)
Optimizing Inter-Processor Data Locality on Embedded Chip Multiprocessors
(Page 227)
Chen, J.-J.
(1+?) Approximation Clock Rate Assignment for Periodic Real-Time Tasks on A Voltage-Scaling Processor
(Page 247)
Chen, K.
Toward a Semantic Anchoring Infrastructure for Domain-Specific Modeling Languages
(Page 35)
Chen, X.
A Unified HW/SW Interface Model to Remove Discontinuities between HW and SW Design
(Page 159)
Cheng, P.
High-level Real-time Programming in Java
(Page 68)
Cheong, E.
Semantics-Based Optimization Across Uncoordinated Tasks in Networked Embedded Systems
(Page 273)
Cohen, A.
Synchronization of Periodic Clocks
(Page 339)
Colaço, J.-L.
A Conservative Extension of Synchronous Data-flow with State Machines
(Page 173)
Combaz, J.
QoS Control for Optimality and Safety
(Page 90)
Corporaal, H.
Centralized End-to-End Flow Control in a Best-Effort Network-on-Chip
(Page 17)
Davidson,
J.
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Using De-optimization to Re-optimize Code
(Page 114)
de Alfaro, L.
Code Aware Resource Management
(Page 191)
Ding, S.
A GA-Based Scheduling Method for FlexRay Systems
(Page 110)
Duc, B. M.
Uniform Object Modeling Methodology and Reuse of Real-time System Using UML
(Page 44)
Duranton, M.
Synchronization of Periodic Clocks
(Page 339)
Edwards,
S. A.
(Return
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SHIM: A Deterministic Model for Heterogeneous Embedded Systems
(Page 264)
Eirea, G.
A Formal Approach to Fault Tree Synthesis for the Analysis of Distributed Fault Tolerant Systems
(Page 237)
Eisenbeis, C.
Synchronization of Periodic Clocks
(Page 339)
Faella,
M.
(Return
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Code Aware Resource Management
(Page 191)
Feng, X.
Towards Real-Time Enabled Microsoft Windows
(Page 142)
Cutpoints for Formal Equivalence Verification of Embedded Software
(Page 307)
Fernandez, J.-C.
QoS Control for Optimality and Safety
(Page 90)
Ferrari, A.
Efficient Embedded Software Design with Synchronous Models
(Page 187)
Fischmeister, S.
Distributed-Code Generation from Hybrid Systems Models for Time-delayed Multirate Systems
(Page 210)
Gajski,
D.
(Return
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What will System Level Design be When It Grows Up?
(Page 79)
Glossner, J.
Grand Challenges in Embedded Systems
(Page 375)
Goodwin, D.
What will System Level Design be When It Grows Up?
(Page 79)
Griese, B.
Dynamic Online Reconfiguration for Customizable and Self-Optimizing Operating Systems
(Page 335)
Grove, D.
High-level Real-time Programming in Java
(Page 68)
Gurun, S.
AutoDVS: An Automatic, General-Purpose, Dynamic Clock Scheduling System for Hand-Held Devices
(Page 218)
Hamon,
G.
(Return
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A Denotational Semantics for Stateflow
(Page 164)
Hauswirth, M.
High-level Real-time Programming in Java
(Page 68)
Helander, J.
Deeply Embedded XML Communication – Towards an Interoperable and Seamless World
(Page 62)
Hellestrand, G. R.
Systems Architecture: The Empirical Way — Abstract Architectures to 'Optimal' Systems: Democritus and Plato Re-engage Digitally 2,400 years on!
(Page 147)
Hind, M.
High-level Real-time Programming in Java
(Page 68)
Hines, S.
Using De-optimization to Re-optimize Code
(Page 114)
Hu, A. J.
Cutpoints for Formal Equivalence Verification of Embedded Software
(Page 307)
Huang, C.-W.
A Sink-N-Hoist Framework for Leakage Power Reduction
(Page 124)
Islam,
N.
(Return
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HAIL: A Language for Easy and Correct Device Access
(Page 1)
Jackson,
E. K.
(Return
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Using Separation of Concerns for Embedded Systems Design
(Page 25)
Jagadeesan, L. J.
Passive Mid-Stream Monitoring of Real-Time Properties
(Page 343)
Jerraya, A. A.
A Unified HW/SW Interface Model to Remove Discontinuities between HW and SW Design
(Page 159)
Johnson, S. D.
The Formal Verification of a Reintegration Protocol
(Page 286)
Kallahalla,
M.
(Return
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HAIL: A Language for Easy and Correct Device Access
(Page 1)
Kanajan, S.
A Formal Approach to Fault Tree Synthesis for the Analysis of Distributed Fault Tolerant Systems
(Page 237)
Kandemir, M.
Exploiting Last Idle Periods of Links for Network Power Management
(Page 134)
Optimizing Inter-Processor Data Locality on Embedded Chip Multiprocessors
(Page 227)
Karakoy, M.
Exploiting Last Idle Periods of Links for Network Power Management
(Page 134)
Kejariwal, A.
High Performance Annotation-aware JVM for Java Cards
(Page 52)
Kim, J.
Distributed-Code Generation from Hybrid Systems Models for Time-delayed Multirate Systems
(Page 210)
Kirsch, C. M.
High-level Real-time Programming in Java
(Page 68)
Kondratyev, A.
A Structural Approach to Quasi-Static Schedulability Analysis of Communicating Concurrent Programs
(Page 10)
Krintz, C.
AutoDVS: An Automatic, General-Purpose, Dynamic Clock Scheduling System for Hand-Held Devices
(Page 218)
Krüger, I. H.
Model-Based Run-Time Monitoring of End-to-End Deadlines
(Page 100)
Kulkarni, P.
Using De-optimization to Re-optimize Code
(Page 114)
Kuo, T.-W.
(1+ε) Approximation Clock Rate Assignment for Periodic Real-Time Tasks on A Voltage-Scaling Processor
(Page 247)
Larsen,
K. G.
(Return
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Testing Real-Time Embedded Software using UPPAAL-TRON: An Industrial Case Study
(Page 299)
Lee, I.
Distributed-Code Generation from Hybrid Systems Models for Time-delayed Multirate Systems
(Page 210)
Lee, J. K.
A Sink-N-Hoist Framework for Leakage Power Reduction
(Page 124)
Lepley, T.
QoS Control for Optimality and Safety
(Page 90)
Li, F.
Exploiting Last Idle Periods of Links for Network Power Management
(Page 134)
Liu, C.
A Structural Approach to Quasi-Static Schedulability Analysis of Communicating Concurrent Programs
(Page 10)
Liu, J.
Semantics-Based Optimization Across Uncoordinated Tasks in Networked Embedded Systems
(Page 273)
Lysaght, P.
What will System Level Design be When It Grows Up?
(Page 79)
Madl,
G.
(Return
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Model-based Analysis of Distributed Real-time Embedded System Composition
(Page 371)
Maillet-Contoz, L.
PINAPA: An Extraction Tool for SystemC Descriptions of Systems-on-a-Chip
(Page 317)
Majumdar, R.
Code Aware Resource Management
(Page 191)
Mangeruca, L.
Efficient Embedded Software Design with Synchronous Models
(Page 187)
Maraninchi, F.
PINAPA: An Extraction Tool for SystemC Descriptions of Systems-on-a-Chip
(Page 317)
Marinescu, M.-C.
From Statecharts to ESP*: Programming With Events, States and Predicates For Embedded Systems
(Page 48)
Martin, G.
What will System Level Design be When It Grows Up?
(Page 79)
Marwedel, P.
What will System Level Design be When It Grows Up?
(Page 79)
McKelvin Jr., M. L.
A Formal Approach to Fault Tree Synthesis for the Analysis of Distributed Fault Tolerant Systems
(Page 237)
Meisinger, M.
Model-Based Run-Time Monitoring of End-to-End Deadlines
(Page 100)
Melhem, R.
Minimizing Expected Energy in Real-Time Embedded Systems
(Page 251)
Mignolet, J.-Y.
Centralized End-to-End Flow Control in a Best-Effort Network-on-Chip
(Page 17)
Mikucionis, M.
Testing Real-Time Embedded Software using UPPAAL-TRON: An Industrial Case Study
(Page 299)
Mossé, D.
Minimizing Expected Energy in Real-Time Embedded Systems
(Page 251)
Moy, M.
PINAPA: An Extraction Tool for SystemC Descriptions of Systems-on-a-Chip
(Page 317)
Mudge, T.
Grand Challenges in Embedded Systems
(Page 375)
Muehlberger, A.
Power Consumption Profile Analysis for Security Attack Simulation in Smart Cards at High Abstraction Level
(Page 214)
Muller, M.
What will System Level Design be When It Grows Up?
(Page 79)
Murakami, N.
A GA-Based Scheduling Method for FlexRay Systems
(Page 110)
Neema,
S.
(Return
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Toward a Semantic Anchoring Infrastructure for Domain-Specific Modeling Languages
(Page 35)
Neffe, U.
Power Consumption Profile Analysis for Security Attack Simulation in Smart Cards at High Abstraction Level
(Page 214)
Nicolau, A.
High Performance Annotation-aware JVM for Java Cards
(Page 52)
Nielsen, B.
Testing Real-Time Embedded Software using UPPAAL-TRON: An Industrial Case Study
(Page 299)
Nollet, V.
Centralized End-to-End Flow Control in a Best-Effort Network-on-Chip
(Page 17)
Oberthür,
S.
(Return
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Dynamic Online Reconfiguration for Customizable and Self-Optimizing Operating Systems
(Page 335)
Ouy, J.
From Multi-clocked Synchronous Processes to Latency-insensitive Modules
(Page 282)
Pagano,
B.
(Return
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A Conservative Extension of Synchronous Data-flow with State Machines
(Page 173)
Pagetti, C.
Synchronization of Periodic Clocks
(Page 339)
Pétrot, F.
A Unified HW/SW Interface Model to Remove Discontinuities between HW and SW Design
(Page 159)
Phillips, W.
Model-Based Run-Time Monitoring of End-to-End Deadlines
(Page 100)
Pike, L.
The Formal Verification of a Reintegration Protocol
(Page 286)
Pinello, C.
A Formal Approach to Fault Tree Synthesis for the Analysis of Distributed Fault Tolerant Systems
(Page 237)
Plateau, F.
Synchronization of Periodic Clocks
(Page 339)
Potop-Butucaru, D.
From Multi-clocked Synchronous Processes to Latency-insensitive Modules
(Page 282)
Pouzet, M.
A Conservative Extension of Synchronous Data-flow with State Machines
(Page 173)
Synchronization of Periodic Clocks
(Page 339)
Rajan,
V. T.
(Return
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High-level Real-time Programming in Java
(Page 68)
Regehr, J.
Random Testing of Interrupt-Driven Software
(Page 290)
Riccobene, E.
A UML 2.0 Profile for SystemC: Toward High-level SoC Design
(Page 138)
Rieger, E.
Power Consumption Profile Analysis for Security Attack Simulation in Smart Cards at High Abstraction Level
(Page 214)
Rosti, A.
A UML 2.0 Profile for SystemC: Toward High-level SoC Design
(Page 138)
Rothbart, K.
Power Consumption Profile Analysis for Security Attack Simulation in Smart Cards at High Abstraction Level
(Page 214)
Rowen, C.
Grand Challenges in Embedded Systems
(Page 375)
Sangiovanni-Vincentelli,
A.
(Return
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A Structural Approach to Quasi-Static Schedulability Analysis of Communicating Concurrent Programs
(Page 10)
Rialto: a Bridge between Description and Implementation of Control Algorithms for Wireless Sensor Networks
(Page 183)
Grand Challenges in Embedded Systems
(Page 375)
Sangiovanni-Vincentelli, A. L.
Efficient Embedded Software Design with Synchronous Models
(Page 187)
A Formal Approach to Fault Tree Synthesis for the Analysis of Distributed Fault Tolerant Systems
(Page 237)
Tag Machines
(Page 255)
Scaife, N.
Semantics-Preserving and Memory-Efficient Implementation of Inter-Task Communication on Static-Priority or EDF Schedulers
(Page 353)
Scandurra, P.
A UML 2.0 Profile for SystemC: Toward High-level SoC Design
(Page 138)
Sengupta, R.
Distributing Synchronous Programs Using Bounded Queues
(Page 325)
Shih, C.-S.
(1+?) Approximation Clock Rate Assignment for Periodic Real-Time Tasks on A Voltage-Scaling Processor
(Page 247)
Sifakis, J.
QoS Control for Optimality and Safety
(Page 90)
Skou, A.
Testing Real-Time Embedded Software using UPPAAL-TRON: An Industrial Case Study
(Page 299)
Sofronis, C.
Semantics-Preserving and Memory-Efficient Implementation of Inter-Task Communication on Static-Priority or EDF Schedulers
(Page 353)
Spoonhower, D.
High-level Real-time Programming in Java
(Page 68)
Sreedhar, V. C.
From Statecharts to ESP*: Programming With Events, States and Predicates For Embedded Systems
(Page 48)
Stankovic, J. A.
Dual Face Phased Array Radar Scheduling with Multiple Constraints
(Page 361)
Steger, Ch.
Power Consumption Profile Analysis for Security Attack Simulation in Smart Cards at High Abstraction Level
(Page 214)
Sun, J.
HAIL: A Language for Easy and Correct Device Access
(Page 1)
Sztipanovits, J.
Using Separation of Concerns for Embedded Systems Design
(Page 25)
Toward a Semantic Anchoring Infrastructure for Domain-Specific Modeling Languages
(Page 35)
Grand Challenges in Embedded Systems
(Page 375)
Takada,
H.
(Return
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A GA-Based Scheduling Method for FlexRay Systems
(Page 110)
Talpin, J.-P.
From Multi-clocked Synchronous Processes to Latency-insensitive Modules
(Page 282)
Tardieu, O.
SHIM: A Deterministic Model for Heterogeneous Embedded Systems
(Page 264)
Thiele, L.
Real-Time Interfaces for Interface-Based Design of Real-Time Systems with Fixed Priority Scheduling
(Page 80)
Tomiyama, H.
A GA-Based Scheduling Method for FlexRay Systems
(Page 110)
Tripakis, S.
Semantics-Preserving and Memory-Efficient Implementation of Inter-Task Communication on Static-Priority or EDF Schedulers
(Page 353)
Vechev,
M. T.
(Return
to Top)
High-level Real-time Programming in Java
(Page 68)
Veidenbaum, A.
High Performance Annotation-aware JVM for Java Cards
(Page 52)
Verkest, D.
Centralized End-to-End Flow Control in a Best-Effort Network-on-Chip
(Page 17)
Viswanathan, R.
Passive Mid-Stream Monitoring of Real-Time Properties
(Page 343)
Wandeler,
E.
(Return
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Real-Time Interfaces for Interface-Based Design of Real-Time Systems with Fixed Priority Scheduling
(Page 80)
Watanabe, Y.
A Structural Approach to Quasi-Static Schedulability Analysis of Communicating Concurrent Programs
(Page 10)
Weiss, R.
Power Consumption Profile Analysis for Security Attack Simulation in Smart Cards at High Abstraction Level
(Page 214)
Welser, J.
What will System Level Design be When It Grows Up?
(Page 79)
Whalley, D.
Using De-optimization to Re-optimize Code
(Page 114)
Wolf, W.
Grand Challenges in Embedded Systems
(Page 375)
Xu,
R.
(Return
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Minimizing Expected Energy in Real-Time Embedded Systems
(Page 251)
Yahav,
E.
(Return
to Top)
High-level Real-time Programming in Java
(Page 68)
Yan, J.
Compiler-guided Register Reliability Improvement Against Soft Errors
(Page 203)
You, Y.-P.
A Sink-N-Hoist Framework for Leakage Power Reduction
(Page 124)
Yuan, W.
HAIL: A Language for Easy and Correct Device Access
(Page 1)
Zennaro,
M.
(Return
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Distributing Synchronous Programs Using Bounded Queues
(Page 325)
Zhang, W.
Compiler-guided Register Reliability Improvement Against Soft Errors
(Page 203)
Zhao, F.
Semantics-Based Optimization Across Uncoordinated Tasks in Networked Embedded Systems
(Page 273)
Grand Challenges in Embedded Systems
(Page 375)
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