Session 1: Communication and Devices (Return to Contents) HAIL: A Language for Easy and Correct Device Access (Page 1) A
Structural Approach to Quasi-Static Schedulability Analysis of Communicating
Concurrent Programs (Page 10) Centralized
End-to-End Flow Control in a Best-Effort Network-on-Chip (Page
17) Communication
Strategies for Shared-Bus Embedded Multiprocessors (Page
21) Session 2: Modeling (Return to Contents) Using Separation of Concerns for Embedded Systems Design (Page 25) Toward a Semantic Anchoring Infrastructure for Domain-Specific Modeling Languages (Page 35) Uniform Object Modeling Methodology and Reuse of Real-time System Using UML (Page 44) From Statecharts to ESP*: Programming With Events, States and Predicates For Embedded Systems (Page 48) Session 3: Languages (Return to Contents) High Performance Annotation-aware JVM for Java Cards (Page 52) Deeply Embedded XML Communication – Towards an Interoperable and Seamless World (Page 62) High-level
Real-time Programming in Java (Page 68) Panel 1 (Return to Contents) What
will System Level Design be When It Grows Up? (Page 79) Session 4: Scheduling (Return to Contents) Real-Time Interfaces for Interface-Based Design of Real-Time Systems with Fixed Priority Scheduling (Page 80) QoS
Control for Optimality and Safety (Page 90) Model-Based
Run-Time Monitoring of End-to-End Deadlines (Page 100) A GA-Based Scheduling Method for FlexRay Systems (Page 110) Session 5: Optimization (Return to Contents) Using
De-optimization to Re-optimize Code (Page 114) A Sink-N-Hoist Framework for Leakage Power Reduction (Page 124) Exploiting
Last Idle Periods of Links for Network Power Management (Page
134) A
UML 2.0 Profile for SystemC: Toward High-level SoC Design (Page
138) Session 6: Design Methodologies (Return to Contents) Towards Real-Time Enabled Microsoft Windows (Page 142) Systems Architecture: The Empirical Way — Abstract Architectures to 'Optimal' Systems: Democritus and Plato Re-engage Digitally 2,400 years on! (Page 147) A Unified HW/SW Interface Model to Remove Discontinuities between HW and SW Design (Page 159) Session 7: Specification and Semantics (Return to Contents) A Denotational Semantics for Stateflow (Page 164) A
Conservative Extension of Synchronous Data-flow with State Machines (Page
173) Rialto:
a Bridge between Description and Implementation of Control Algorithms
for Wireless Sensor Networks (Page 183) Efficient
Embedded Software Design with Synchronous Models (Page
187) Session 8: Compilation and Power (Return to Contents) Code
Aware Resource Management (Page 191) Compiler-guided Register Reliability Improvement Against Soft Errors (Page 203) Distributed-Code Generation from Hybrid Systems Models for Time-delayed Multirate Systems (Page 210) Power
Consumption Profile Analysis for Security Attack Simulation in Smart Cards
at High Abstraction Level (Page 214) Session 9: Clocks and Energy (Return to Contents) AutoDVS: An Automatic, General-Purpose, Dynamic Clock Scheduling System for Hand-Held Devices (Page 218) Optimizing Inter-Processor Data Locality on Embedded Chip Multiprocessors (Page 227) A
Formal Approach to Fault Tree Synthesis for the Analysis of Distributed
Fault Tolerant Systems (Page 237) (1+?) Approximation Clock Rate Assignment for Periodic Real-Time Tasks on A Voltage-Scaling Processor (Page 247) Minimizing Expected Energy in Real-Time Embedded Systems (Page 251) Session 10: Formal Methods (Return to Contents) Tag
Machines (Page 255) SHIM: A Deterministic Model for Heterogeneous Embedded Systems (Page 264) Semantics-Based
Optimization Across Uncoordinated Tasks in Networked Embedded Systems
(Page 273) From Multi-clocked Synchronous Processes to Latency-insensitive Modules (Page 282) The
Formal Verification of a Reintegration Protocol (Page 286) Session
11: Software Testing
(Return
to Contents) Random Testing of Interrupt-Driven Software (Page 290) Testing Real-Time Embedded Software using UPPAAL-TRON: An Industrial Case Study (Page 299) Cutpoints for Formal Equivalence Verification of Embedded Software (Page 307) Session 12: Specification and Dynamic Properties (Return to Contents) PINAPA:
An Extraction Tool for SystemC Descriptions of Systems-on-a-Chip (Page
317) Distributing Synchronous Programs Using Bounded Queues (Page 325) Dynamic Online Reconfiguration for Customizable and Self-Optimizing Operating Systems (Page 335) Synchronization
of Periodic Clocks (Page 339) Session 13: Real Time Properties (Return to Contents) Passive Mid-Stream Monitoring of Real-Time Properties (Page 343) Semantics-Preserving and Memory-Efficient Implementation of Inter-Task Communication on Static-Priority or EDF Schedulers (Page 353) Dual Face Phased Array Radar Scheduling with Multiple Constraints (Page 361) Model-based
Analysis of Distributed Real-time Embedded System Composition (Page
371) Panel 2 (Return to Contents) Grand
Challenges in Embedded Systems (Page 375) |